soc/amd: Refactor DPTC Tablet Mode

Refactor AMD DPTC tablet mode in preparation for adding low/no battery
DPTC settings.

1. Refactor and simplify acpigen_write_alib_dptc() into the following
   functions:
   - acpigen_write_alib_dptc_default()
   - acpigen_write_alib_dptc_tablet()
2. Add device tree register value dptc_tablet_mode_enable to control
   whether DPTC tablet mode is enabled for a variant.
3. Add dptc.asl to perform the necessary ACPI checking before modifying
   the DPTC settings.

BRANCH=none
BUG=b:217911928
TEST=Build zork
TEST=Build nipperkin
TEST=Boot skyrim

Change-Id: I2518fdd526868c9d5668a6018fd3570392e809c0
Signed-off-by: Tim Van Patten <timvp@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66994
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>

1 files changed, 25 insertions, 0 deletions

diff --git a/src/soc/amd/common/acpi/dptc.asl b/src/soc/amd/common/acpi/dptc.asl
new file mode 100644
index 0000000000..611024cb02
--- /dev/null
+++ b/src/soc/amd/common/acpi/dptc.asl
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+External(\_SB.DDEF, MethodObj)
+External(\_SB.DTAB, MethodObj)
+
+Scope (\_SB)
+{
+    Method (DPTC, 0, Serialized)
+    {
+        /* If _SB.DDEF is not present, DPTC is not enabled so return early. */
+        If (!CondRefOf (\_SB.DDEF))
+        {
+            Return (Zero)
+        }
+
+        If (CondRefOf (\_SB.DTAB) && (\_SB.PCI0.LPCB.EC0.TBMD == One))
+        {
+            \_SB.DTAB()
+            Return (Zero)
+        }
+
+        \_SB.DDEF()
+        Return (Zero)
+    }
+}