diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-09-24 20:07:15 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-10-19 06:55:47 +0000 |
| commit | eac283fb0c57398611f73dd9bdee7e0c598d2821 (patch) | |
| tree | 87f5228e9263ae9a66d539f29670309bd6395e21 /src/soc/amd/common/acpi/lpc.asl | |
| parent | a01138b7a4c5c4d6078d5995d81f5f3c31364db2 (diff) | |
soc/amd/common/acpi: Convert to ASL 2.0 syntax
Change-Id: I3d5f595ebbc865501b086aebee1f492b4ab15ecd
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45700
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/amd/common/acpi/lpc.asl')
| -rw-r--r-- | src/soc/amd/common/acpi/lpc.asl | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/amd/common/acpi/lpc.asl b/src/soc/amd/common/acpi/lpc.asl index e4b0689bd2..d2224e8f13 100644 --- a/src/soc/amd/common/acpi/lpc.asl +++ b/src/soc/amd/common/acpi/lpc.asl @@ -41,10 +41,10 @@ Device(LPCB) { { CreateDwordField(^CRS,^BAR0._BAS,SPIB) // Field to hold SPI base address CreateDwordField(^CRS,^BAR1._BAS,ESPB) // Field to hold eSPI base address - And(BAR, 0xffffff00, Local0) - Store(Local0, SPIB) // SPI base address mapped - Add(Local0, 0x10000, Local1) - Store(Local1, ESPB) // eSPI base address mapped + Local0 = BAR & 0xffffff00 + SPIB = Local0 // SPI base address mapped + Local1 = Local0 + 0x10000 + ESPB = Local1 // eSPI base address mapped Return(CRS) } } |