soc/amd/stoneyridge: Add northbridge support

Copy northbridge files from northbridge/amd/pi/00670F00
to soc/amd/stoneyridge and soc/amd/common.

Changes:
- update chip_ops and device_ops
- remove multi-node support
- clean up Kconfig and Makefile

Change-Id: Ie86b4d744900f23502068517ece5bcea6c128993
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19724
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>

1 files changed, 4 insertions, 0 deletions

diff --git a/src/soc/amd/common/Makefile.inc b/src/soc/amd/common/Makefile.inc
index 1a4927efaa..9d4588d079 100644
--- a/src/soc/amd/common/Makefile.inc
+++ b/src/soc/amd/common/Makefile.inc
@@ -2,10 +2,14 @@ ifeq ($(CONFIG_SOC_AMD_COMMON),y)
 
 cpu_incs-y += $(src)/soc/amd/common/cache_as_ram.inc
 
+romstage-y += agesawrapper.c
+romstage-y += def_callouts.c
 romstage-y += heapmanager.c
 
+ramstage-y += agesawrapper.c
 ramstage-y += amd_late_init.c
 ramstage-y += amd_pci_util.c
+ramstage-y += def_callouts.c
 ramstage-y += heapmanager.c
 ramstage-$(CONFIG_SPI_FLASH) += spi.c