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authorFelix Held <felix-coreboot@felixheld.de>2022-10-18 20:43:00 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-10-20 16:46:31 +0000
commitba35f3582e95fdc3d9313a63d6ee0072283f5c7f (patch)
tree0fa3607de010f7614b68bdbb75a62a24d73abea9 /src/soc/amd/cezanne
parent880364040a856489bd2f40fec6c6c246e8e960a6 (diff)
soc/amd: move all AOAC function prototypes to amdblocks/aoac.h
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I3deae150cd1e20fff6507a0f0ba6a375fca430e5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68559 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/soc/amd/cezanne')
-rw-r--r--src/soc/amd/cezanne/early_fch.c1
-rw-r--r--src/soc/amd/cezanne/include/soc/southbridge.h3
2 files changed, 1 insertions, 3 deletions
diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c
index 4935f661db..0b8e9a0161 100644
--- a/src/soc/amd/cezanne/early_fch.c
+++ b/src/soc/amd/cezanne/early_fch.c
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/acpimmio.h>
+#include <amdblocks/aoac.h>
#include <amdblocks/espi.h>
#include <amdblocks/i2c.h>
#include <amdblocks/lpc.h>
diff --git a/src/soc/amd/cezanne/include/soc/southbridge.h b/src/soc/amd/cezanne/include/soc/southbridge.h
index 4e44b89fe4..4cd53cb5d1 100644
--- a/src/soc/amd/cezanne/include/soc/southbridge.h
+++ b/src/soc/amd/cezanne/include/soc/southbridge.h
@@ -118,7 +118,4 @@ void fch_early_init(void);
void fch_init(void *chip_info);
void fch_final(void *chip_info);
-void enable_aoac_devices(void);
-void wait_for_aoac_enabled(unsigned int dev);
-
#endif /* AMD_CEZANNE_SOUTHBRIDGE_H */