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authorFelix Held <felix-coreboot@felixheld.de>2022-10-18 20:52:42 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-10-20 16:47:11 +0000
commit8ebdbbc3cb0aaca6581a7ba0a3ad92784ed502df (patch)
tree0b5f46981ea76cc9a99ac65fa05505d058ef831b /src/soc/amd/cezanne
parentba35f3582e95fdc3d9313a63d6ee0072283f5c7f (diff)
soc/amd: move set_uart_config prototype to common UART header
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I97860292fd3cd0330fec40edb31089cd6608906b Reviewed-on: https://review.coreboot.org/c/coreboot/+/68560 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/soc/amd/cezanne')
-rw-r--r--src/soc/amd/cezanne/early_fch.c1
-rw-r--r--src/soc/amd/cezanne/include/soc/uart.h1
2 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c
index 0b8e9a0161..9e99da227d 100644
--- a/src/soc/amd/cezanne/early_fch.c
+++ b/src/soc/amd/cezanne/early_fch.c
@@ -7,6 +7,7 @@
#include <amdblocks/lpc.h>
#include <amdblocks/pmlib.h>
#include <amdblocks/smbus.h>
+#include <amdblocks/uart.h>
#include <soc/i2c.h>
#include <soc/southbridge.h>
#include <soc/uart.h>
diff --git a/src/soc/amd/cezanne/include/soc/uart.h b/src/soc/amd/cezanne/include/soc/uart.h
index 8affe10ce3..b9242d7e38 100644
--- a/src/soc/amd/cezanne/include/soc/uart.h
+++ b/src/soc/amd/cezanne/include/soc/uart.h
@@ -5,7 +5,6 @@
#include <types.h>
-void set_uart_config(unsigned int idx); /* configure hardware of FCH UART selected by idx */
void clear_uart_legacy_config(void); /* disable legacy I/O decode for FCH UART */
#endif /* AMD_CEZANNE_UART_H */