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authorFelix Held <felix-coreboot@felixheld.de>2022-03-02 22:57:01 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-03-03 22:45:02 +0000
commit56b037b857e17691dfb528f969772a8acb28b2c4 (patch)
tree9fb91dd6bab1b15fb01a7bde774f2d395f83ffca /src/soc/amd/cezanne
parent49fff57a097dfca9e3a090103b4c42a4f3f57a8e (diff)
soc/amd/*/northbridge,root_complex: simplify mmconf_resource index
In the northbridge's and root complex' read_resources function, the mmconf resource used the number of the MMIO_CONF_BASE MSR as index which might be misleading. Instead use idx++ as a unique index for this resource. TEST=Resource allocator doesn't complain and no related warnings or errors in dmesg. The update_constraints console output changes like expected: Before: PCI: 00:00.0 c0010058 base f8000000 limit fbffffff mem (fixed) After: PCI: 00:00.0 06 base f8000000 limit fbffffff mem (fixed) Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Id66c6153fad86bed36db7bd2455075f4a0850750 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62545 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/cezanne')
-rw-r--r--src/soc/amd/cezanne/root_complex.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/cezanne/root_complex.c b/src/soc/amd/cezanne/root_complex.c
index dde59d4dee..e29b4e03e4 100644
--- a/src/soc/amd/cezanne/root_complex.c
+++ b/src/soc/amd/cezanne/root_complex.c
@@ -138,7 +138,7 @@ static void read_resources(struct device *dev)
ram_resource(dev, idx++, early_reserved_dram_end / KiB,
(mem_usable - early_reserved_dram_end) / KiB);
- mmconf_resource(dev, MMIO_CONF_BASE);
+ mmconf_resource(dev, idx++);
if (!hob) {
printk(BIOS_ERR, "%s incomplete because no HOB list was found\n",