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authorFelix Held <felix-coreboot@felixheld.de>2022-09-29 16:06:45 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-09-30 14:49:25 +0000
commit25866fe89321ca57aae4dde062db4c88086e187b (patch)
treee357176b1ae2aa477fdc0a1b405e747ef7c14e9b /src/soc/amd/cezanne
parentf69cb29c20e40750e7b0595852ea9030050ebe2a (diff)
soc/amd/cezanne,mendocino,picasso/uart: use write16p to avoid typecasts
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I6e743068dfcf9d393096f775759181af1a1c470d Reviewed-on: https://review.coreboot.org/c/coreboot/+/67979 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Diffstat (limited to 'src/soc/amd/cezanne')
-rw-r--r--src/soc/amd/cezanne/uart.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/cezanne/uart.c b/src/soc/amd/cezanne/uart.c
index 7917ebd195..64252cad2b 100644
--- a/src/soc/amd/cezanne/uart.c
+++ b/src/soc/amd/cezanne/uart.c
@@ -37,7 +37,7 @@ uintptr_t get_uart_base(unsigned int idx)
void clear_uart_legacy_config(void)
{
- write16((void *)FCH_LEGACY_UART_DECODE, 0);
+ write16p(FCH_LEGACY_UART_DECODE, 0);
}
void set_uart_config(unsigned int idx)