diff options
| author | Yuchen He <yuchenhe126@gmail.com> | 2023-07-25 21:28:36 +0200 |
|---|---|---|
| committer | Matt DeVillier <matt.devillier@amd.corp-partner.google.com> | 2023-08-05 16:04:46 +0000 |
| commit | 1e67adbc73e30be098ce163e3d27a7a7ecf68ae0 (patch) | |
| tree | a2880851ac6c754d94fc056472beb5ec133ab0b4 /src/soc/amd/cezanne | |
| parent | 71b8ee0da407158d51eb7d86a6e1d4c458fc8e96 (diff) | |
src/*/post_code.h: Change post code prefix to POSTCODE
The prefix POSTCODE makes it clear that the macro is a post code.
Hence, replace related macros starting with POST to POSTCODE and
also replace every instance the macros are invoked with the new
name.
The files was changed by running the following bash script from the
top level directory.
header="src/soc/amd/common/block/include/amdblocks/post_codes.h \
src/include/cpu/intel/post_codes.h \
src/soc/intel/common/block/include/intelblocks/post_codes.h"
array=`grep -r "#define POST_" $header | \
tr '\t' ' ' | cut -d ":" -f 2 | cut -d " " -f 2`
for str in $array; do
splitstr=`echo $str | cut -d '_' -f2-`
grep -r $str src | cut -d ':' -f 1 | \
xargs sed -i'' -e "s/$str/POSTCODE_$splitstr/g"
done
Change-Id: Id2ca654126fc5b96e6b40d222bb636bbf39ab7ad
Signed-off-by: Yuchen He <yuchenhe126@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76044
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/cezanne')
| -rw-r--r-- | src/soc/amd/cezanne/romstage.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/cezanne/romstage.c b/src/soc/amd/cezanne/romstage.c index 2bf5e230c9..63a6b07dc6 100644 --- a/src/soc/amd/cezanne/romstage.c +++ b/src/soc/amd/cezanne/romstage.c @@ -13,7 +13,7 @@ void __noreturn romstage_main(void) { - post_code(POST_ROMSTAGE_MAIN); + post_code(POSTCODE_ROMSTAGE_MAIN); /* Snapshot chipset state prior to any FSP call */ fill_chipset_state(); |