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authorMichael Niewöhner <foss@mniewoehner.de>2020-12-21 03:46:58 +0100
committerMichael Niewöhner <foss@mniewoehner.de>2021-01-21 19:03:08 +0000
commiteb723f01afd6fa248560bc6749abd744f3ab3c6c (patch)
tree4fcc6eb9ce1aa76e36c5446981dff9b09949a1a8 /src/soc/amd/cezanne
parent70992a4335560e0336605fe9fffa86c727b63b08 (diff)
mb/siemens/chili: do UART pad configuration at board-level
UART pad configuration should not be done in common code, because that may cause short circuits, when the user sets a wrong UART index. Thus, add the corresponding pads to a bootblock gpio table for the board as a first step. Common UART pad config code then gets dropped in CB:48829. Change-Id: Iad40b6315a29e7aea612a3e1a169372d296d1d6c Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49443 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/cezanne')
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