diff options
author | Raul E Rangel <rrangel@chromium.org> | 2021-05-10 14:49:55 -0600 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-05-12 00:44:17 +0000 |
commit | e4f831786c7b636830f8092bca07fb19b79978a9 (patch) | |
tree | 055f7b4838fb1a58e30484f5fe4875ef4dda590e /src/soc/amd/cezanne | |
parent | 8479656c7194878ff893212ff4a949947e1f290e (diff) |
soc/amd{common,cezanne}: Move pcie_gpp.c to common
Cezanne and Picasso can now use the same driver.
BUG=b:184766519
TEST=Boot guybrush and dump ASL. Verified it didn't change.
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ie4ede82935d6c69b323c1fdceaa61e306aa2820a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54026
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Diffstat (limited to 'src/soc/amd/cezanne')
-rw-r--r-- | src/soc/amd/cezanne/Kconfig | 1 | ||||
-rw-r--r-- | src/soc/amd/cezanne/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/amd/cezanne/pcie_gpp.c | 88 |
3 files changed, 1 insertions, 89 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index 51bc4bc13a..327ec124d2 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -50,6 +50,7 @@ config SOC_SPECIFIC_OPTIONS select SOC_AMD_COMMON_BLOCK_NONCAR select SOC_AMD_COMMON_BLOCK_PCI select SOC_AMD_COMMON_BLOCK_PCI_MMCONF + select SOC_AMD_COMMON_BLOCK_PCIE_GPP_DRIVER select SOC_AMD_COMMON_BLOCK_PM select SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE select SOC_AMD_COMMON_BLOCK_PSP_GEN2 diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc index 7053960e43..4731dc5ce7 100644 --- a/src/soc/amd/cezanne/Makefile.inc +++ b/src/soc/amd/cezanne/Makefile.inc @@ -39,7 +39,6 @@ ramstage-y += data_fabric.c ramstage-y += fch.c ramstage-y += fsp_s_params.c ramstage-y += gpio.c -ramstage-y += pcie_gpp.c ramstage-y += reset.c ramstage-y += root_complex.c ramstage-y += uart.c diff --git a/src/soc/amd/cezanne/pcie_gpp.c b/src/soc/amd/cezanne/pcie_gpp.c deleted file mode 100644 index 58c776146f..0000000000 --- a/src/soc/amd/cezanne/pcie_gpp.c +++ /dev/null @@ -1,88 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include <acpi/acpi_device.h> -#include <acpi/acpigen.h> -#include <acpi/acpigen_pci.h> -#include <amdblocks/amd_pci_util.h> -#include <assert.h> -#include <console/console.h> -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ids.h> -#include <device/pciexp.h> -#include <soc/pci_devs.h> -#include <stdio.h> -#include <stdlib.h> - -static const char *pcie_gpp_acpi_name(const struct device *dev) -{ - char *name; - - if (dev->path.type != DEVICE_PATH_PCI) - return NULL; - - name = malloc(ACPI_NAME_BUFFER_SIZE); - snprintf(name, ACPI_NAME_BUFFER_SIZE, "GP%02x", dev->path.pci.devfn); - name[4] = '\0'; - - return name; -} - -static void acpi_device_write_gpp_pci_dev(const struct device *dev) -{ - const char *scope = acpi_device_scope(dev); - const char *name = acpi_device_name(dev); - - assert(dev->path.type == DEVICE_PATH_PCI); - assert(name); - assert(scope); - - acpigen_write_scope(scope); - acpigen_write_device(name); - - acpigen_write_ADR_pci_device(dev); - acpigen_write_STA(acpi_device_status(dev)); - - acpigen_write_pci_GNB_PRT(dev); - - acpigen_pop_len(); /* Device */ - acpigen_pop_len(); /* Scope */ -} - -static struct device_operations internal_pcie_gpp_ops = { - .read_resources = pci_bus_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_bus_enable_resources, - .scan_bus = pci_scan_bridge, - .reset_bus = pci_bus_reset, - .acpi_name = pcie_gpp_acpi_name, - .acpi_fill_ssdt = acpi_device_write_gpp_pci_dev, -}; - -static const struct pci_driver internal_pcie_gpp_driver __pci_driver = { - .ops = &internal_pcie_gpp_ops, - .vendor = PCI_VENDOR_ID_AMD, - .device = PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_PCIE_GPP_BUSABC, -}; - -static struct device_operations external_pcie_gpp_ops = { - .read_resources = pci_bus_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_bus_enable_resources, - .scan_bus = pciexp_scan_bridge, - .reset_bus = pci_bus_reset, - .acpi_name = pcie_gpp_acpi_name, - .acpi_fill_ssdt = acpi_device_write_gpp_pci_dev, -}; - -static const unsigned short external_pci_gpp_ids[] = { - PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_PCIE_GPP_D1, - PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_PCIE_GPP_D2, - 0 -}; - -static const struct pci_driver external_pcie_gpp_driver __pci_driver = { - .ops = &external_pcie_gpp_ops, - .vendor = PCI_VENDOR_ID_AMD, - .devices = external_pci_gpp_ids, -}; |