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authorRaul E Rangel <rrangel@chromium.org>2022-02-15 14:11:36 -0700
committerFelix Held <felix-coreboot@felixheld.de>2022-02-16 22:08:54 +0000
commitde66e665170ffc60a750f43601f0e4d66b386b76 (patch)
tree2135ada5957efb7003d831ce96cdc7ddecc131d1 /src/soc/amd/cezanne
parentfff20212afe2c83af90dbec39d112a31d34b6658 (diff)
soc/amd/cezanne/psp_verstage/uart: Fix off by 1 error
We only allow index = {0, 1}. Fix the check. BUG=b:215599230 TEST=Build guybrush BRANCH=guybrush Found-by: Coverity CID 1469611 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I59615ab39faeded43b3803b4450c84ab8a8b81ba Reviewed-on: https://review.coreboot.org/c/coreboot/+/61988 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/cezanne')
-rw-r--r--src/soc/amd/cezanne/psp_verstage/uart.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/cezanne/psp_verstage/uart.c b/src/soc/amd/cezanne/psp_verstage/uart.c
index 5a45cb0545..2767b2eb27 100644
--- a/src/soc/amd/cezanne/psp_verstage/uart.c
+++ b/src/soc/amd/cezanne/psp_verstage/uart.c
@@ -10,7 +10,7 @@ uintptr_t get_uart_base(unsigned int idx)
{
uint32_t err;
- if (idx > ARRAY_SIZE(uart_bars))
+ if (idx >= ARRAY_SIZE(uart_bars))
return 0;
if (uart_bars[idx])