diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-06-15 17:08:30 +0200 |
|---|---|---|
| committer | Marshall Dawson <marshalldawson3rd@gmail.com> | 2021-08-29 20:58:51 +0000 |
| commit | 79f28249cdcf8588791eccc97b1e9a8141265c34 (patch) | |
| tree | 44f46bd8ed79261b944e2b54ec941eb71d4b404c /src/soc/amd/cezanne | |
| parent | a11eca149a0aa4d4adb6ef3091c5c4662e10af66 (diff) | |
soc/amd/cezanne/chip: add functionality to power down eMMC interface
Power down the eMMC controller via the AOAC interface when it's not
enabled in the devicetree.
BUG=b:184978118
TEST=On guybrush the unused eMMC controller is disabled in AOAC after
applying this patch. Before this patch it was enabled.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I18f4626a29fdc422218777058341b0eae401bcd4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55537
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/cezanne')
| -rw-r--r-- | src/soc/amd/cezanne/chip.c | 6 | ||||
| -rw-r--r-- | src/soc/amd/cezanne/chipset.cb | 1 |
2 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/chip.c b/src/soc/amd/cezanne/chip.c index 625f46ce8e..f184cb543b 100644 --- a/src/soc/amd/cezanne/chip.c +++ b/src/soc/amd/cezanne/chip.c @@ -1,10 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <amdblocks/aoac.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> #include <fsp/api.h> #include <soc/acpi.h> +#include <soc/aoac_defs.h> #include <soc/cpu.h> #include <soc/data_fabric.h> #include <soc/pci_devs.h> @@ -57,6 +59,10 @@ static void set_mmio_dev_ops(struct device *dev) case APU_UART1_BASE: dev->ops = &cezanne_uart_mmio_ops; break; + case APU_EMMC_BASE: + if (!dev->enabled) + power_off_aoac_device(FCH_AOAC_DEV_EMMC); + break; } } diff --git a/src/soc/amd/cezanne/chipset.cb b/src/soc/amd/cezanne/chipset.cb index bf4480680b..2c685c3ad2 100644 --- a/src/soc/amd/cezanne/chipset.cb +++ b/src/soc/amd/cezanne/chipset.cb @@ -109,4 +109,5 @@ chip soc/amd/cezanne device mmio 0xfedc5000 alias i2c_3 off end device mmio 0xfedc9000 alias uart_0 off end device mmio 0xfedca000 alias uart_1 off end + device mmio 0xfedd5000 alias emmc off end end |