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authorRaul E Rangel <rrangel@chromium.org>2021-11-02 11:51:48 -0600
committerRaul Rangel <rrangel@chromium.org>2021-11-16 18:20:31 +0000
commit571e7f02de2d9e4047c28ace45430a777252cba3 (patch)
treee0351346f60a7396747ba50e4ee63f29eb70b425 /src/soc/amd/cezanne
parentd7e7d60e0fd71c53025d8b081b59cd3d8ee8657c (diff)
lib/prog_loaders, soc/amd/: Make payload_preload use cbfs_preload
Now that CBFS has this functionality built in, we no longer need to manually code it. payload_preload used to use the payload_preload_cache region to store the raw payload contents. This region was placed outside the firmware reserved region, so it was available for use by the OS. This was possible because the payload isn't loaded again on S3 resume. cbfs_preload only uses the cbfs_cache region. This region must be reserved because it gets used on the S3 resume path. Unfortunately this means that cbfs_cache must be increased to hold the payload. Cezanne is the only platform currently using payload_preload, and the size of cbfs_cache has already been adjusted. In the future we could look into adding an option to cbfs_preload that would allow it to use a different memory pool for the cache allocation. BUG=b:179699789 TEST=Boot guybrush and verify preloading the payload was successful CBFS DEBUG: get_preload_rdev(name='fallback/payload') preload successful Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Idc521b238620ff52b8ba481cd3c10e5c4f1394bd Reviewed-on: https://review.coreboot.org/c/coreboot/+/58962 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc/amd/cezanne')
-rw-r--r--src/soc/amd/cezanne/Kconfig1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index 3fb5085c3b..6c8c3e5dab 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -197,7 +197,6 @@ config ASYNC_FILE_LOADING
select COOP_MULTITASKING
select SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA
select CBFS_PRELOAD
- select PAYLOAD_PRELOAD
help
When enabled, the platform will use the LPC SPI DMA controller to
asynchronously load contents from the SPI ROM. This will improve