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author | Felix Held <felix-coreboot@felixheld.de> | 2021-05-31 19:44:46 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2021-06-01 20:37:15 +0000 |
commit | 4fbab545b2a99407ff444a29730c443aee4f24db (patch) | |
tree | bd256e2e0a4f76cf7af09a55e17c33c3be4a646f /src/soc/amd/cezanne | |
parent | c4eb45fa85d9860ce94829c6c977b9e28a297bf9 (diff) |
mainboards using soc/amd/picasso: use aliases for PCIe devices on bus 0
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ia6199c70163d32467abe5ba5da55c73ff62ba10f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55103
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/cezanne')
0 files changed, 0 insertions, 0 deletions