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authorFelix Held <felix.held@amd.corp-partner.google.com>2021-10-14 21:43:11 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-10-15 20:04:44 +0000
commit4e379a237466f4c96546a758ae86f17c7d26eed6 (patch)
treedae831377238a44ec8f15f7a3da08877a9985f61 /src/soc/amd/cezanne
parentf38fbbec2c0061d122466cec346c2634aa26e236 (diff)
soc/amd: make configure_espi_with_mb_hook call conditional
If a system doesn't use eSPI or has the eSPI interface already configured in verstage on PSP, not calling configure_espi_with_mb_hook from fch_pre_init makes it a bit more obvious that the eSPI interface initialization will be skipped. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ia77b83d56a5dab1bac6cfbbd92d33aa60a9e8b89 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58339 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/cezanne')
-rw-r--r--src/soc/amd/cezanne/early_fch.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c
index f97f57c846..f06d5767e9 100644
--- a/src/soc/amd/cezanne/early_fch.c
+++ b/src/soc/amd/cezanne/early_fch.c
@@ -40,8 +40,12 @@ void fch_pre_init(void)
enable_acpimmio_decode_pm04();
/* Setup SPI base by calling lpc_early_init before setting up eSPI. */
lpc_early_init();
- /* Setup eSPI to enable port80 routing. */
- configure_espi_with_mb_hook();
+
+ /* Setup eSPI to enable port80 routing if the board is using eSPI and the eSPI
+ interface hasn't already been set up in verstage on PSP */
+ if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI) && !CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK))
+ configure_espi_with_mb_hook();
+
fch_spi_early_init();
fch_smbus_init();
fch_enable_cf9_io();