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authorFelix Held <felix-coreboot@felixheld.de>2021-07-13 18:21:27 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-07-14 17:35:43 +0000
commita24472a7f88ecfea999e4962931e14f2b319b47a (patch)
tree8bdf78e69702e697294d5e7dac939173699db177 /src/soc/amd/cezanne/mca.c
parent71b918d882738fd99f7894d43a96d5782ad1928b (diff)
soc/amd/cezanne: add basic MCA support
Currently the MCA support for Cezanne only clears the MCA status registers. The MCA error handling and BERT table generation will be added in subsequent patches. Change-Id: Ib9b5174186c28c8c82f57ffd8936c8dad4e63c5b Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56262 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/cezanne/mca.c')
-rw-r--r--src/soc/amd/cezanne/mca.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/mca.c b/src/soc/amd/cezanne/mca.c
new file mode 100644
index 0000000000..7160256539
--- /dev/null
+++ b/src/soc/amd/cezanne/mca.c
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <cpu/x86/msr.h>
+#include <soc/cpu.h>
+
+/* Check the Machine Check Architecture Extension registers */
+void check_mca(void)
+{
+ /* TODO: Implement MCAX register checking and BERT table generation. */
+
+ /* mca_clear_status uses the MCA registers and not the MCAX ones. Since they are
+ aliases, we can use either set of registers. */
+ mca_clear_status();
+}