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authorFelix Held <felix-coreboot@felixheld.de>2021-02-13 01:48:53 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-02-14 21:48:03 +0000
commiteb89ca67ef30dc9c36821081503be98c73781e8d (patch)
tree5b74aa073994278f96e0d3407d95da47fde05c99 /src/soc/amd/cezanne/include
parent906f9be383c9c8258d4c0b6abc6dfebf16aa65e5 (diff)
soc/amd/cezanne/include/iomap: add HPET base address
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I72559147a3f86f0cb843b74af9b148d23229ff14 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50623 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/cezanne/include')
-rw-r--r--src/soc/amd/cezanne/include/soc/iomap.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/include/soc/iomap.h b/src/soc/amd/cezanne/include/soc/iomap.h
index 73640f5ab9..0d59c2c47c 100644
--- a/src/soc/amd/cezanne/include/soc/iomap.h
+++ b/src/soc/amd/cezanne/include/soc/iomap.h
@@ -5,6 +5,12 @@
/* MMIO Ranges */
#define SPI_BASE_ADDRESS 0xfec10000
+
+#if CONFIG(HPET_ADDRESS_OVERRIDE)
+#error HPET address override is not allowed and must be fixed at 0xfed00000
+#endif
+#define HPET_BASE_ADDRESS 0xfed00000
+
/* FCH AL2AHB Registers */
#define ALINK_AHB_ADDRESS 0xfedc0000