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authorFelix Held <felix-coreboot@felixheld.de>2023-12-05 00:41:05 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-12-06 16:01:18 +0000
commitf5b09dbe1840e2ba2bbc9b2c6225e838cb7a32b9 (patch)
tree3f3224e9ceb971d762207c1c733e37b4d930e10c /src/soc/amd/cezanne/chipset.cb
parent3e306d48cd9f862e55e4458da0eb2c6a606cb796 (diff)
soc/amd/*/chipset.cb: don't call dummy device functions host bridges
Function 0 of the devices that have the bridges to other buses are dummy functions that can be left enabled to not have to shuffle around the device function numbers when the first PCI bridge on those devices isn't enabled. Those dummy device functions are however not PCI host bridges, so change the comments from 'Dummy Host Bridge' to 'Dummy device function'. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Suggested-by: Nico Huber <nico.h@gmx.de> Change-Id: Ibddfdf558d84bc44434d718b86f41bd06044b22a Reviewed-on: https://review.coreboot.org/c/coreboot/+/79396 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/cezanne/chipset.cb')
-rw-r--r--src/soc/amd/cezanne/chipset.cb6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/amd/cezanne/chipset.cb b/src/soc/amd/cezanne/chipset.cb
index 0762ea1d26..ccce4859d8 100644
--- a/src/soc/amd/cezanne/chipset.cb
+++ b/src/soc/amd/cezanne/chipset.cb
@@ -7,12 +7,12 @@ chip soc/amd/cezanne
device pci 00.0 alias gnb on ops cezanne_root_complex_operations end
device pci 00.2 alias iommu off ops amd_iommu_ops end
- device pci 01.0 on end # Dummy Host Bridge, do not disable
+ device pci 01.0 on end # Dummy device function, do not disable
device pci 01.1 alias gpp_gfx_bridge_0 off ops amd_external_pcie_gpp_ops end
device pci 01.2 alias gpp_gfx_bridge_1 off ops amd_external_pcie_gpp_ops end
device pci 01.3 alias gpp_gfx_bridge_2 off ops amd_external_pcie_gpp_ops end
- device pci 02.0 on end # Dummy Host Bridge, do not disable
+ device pci 02.0 on end # Dummy device function, do not disable
device pci 02.1 alias gpp_bridge_0 off ops amd_external_pcie_gpp_ops end
device pci 02.2 alias gpp_bridge_1 off ops amd_external_pcie_gpp_ops end
device pci 02.3 alias gpp_bridge_2 off ops amd_external_pcie_gpp_ops end
@@ -21,7 +21,7 @@ chip soc/amd/cezanne
device pci 02.6 alias gpp_bridge_5 off ops amd_external_pcie_gpp_ops end
device pci 02.7 alias gpp_bridge_6 off ops amd_external_pcie_gpp_ops end
- device pci 08.0 on end # Dummy Host Bridge, do not disable
+ device pci 08.0 on end # Dummy device function, do not disable
device pci 08.1 alias gpp_bridge_a off # Internal GPP Bridge 0 to Bus A
ops amd_internal_pcie_gpp_ops
device pci 0.0 alias gfx off ops amd_graphics_ops end # Internal GPU (GFX)