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authorSrinidhi N Kaushik <srinidhi.n.kaushik@intel.com>2020-11-25 01:54:35 -0800
committerFurquan Shaikh <furquan@google.com>2020-12-08 22:57:45 +0000
commit237afda813c87fa65cb2adf2df9e7368d0479034 (patch)
tree5638e23151e7f4dda079b23cdadcfd89b618550b /src/soc/amd/cezanne/bootblock.c
parent609490854e60aa17fec246642fdf9a6205b33eb4 (diff)
src/soc/intel/tigerlake: Add SPI DMI Destination ID
This change adds the SPI-DMI Destination ID for tigerlake soc. This is needed for enabling support for extended BIOS region. Also, implements a SOC helper function soc_get_spi_dmi_destination_id() which returns SPI-DMI Destination id. BUG=b:171534504 Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Change-Id: I0b6a8af0c1e79fa668ef2f84b93f3bbece59eb6a Reviewed-on: https://review.coreboot.org/c/coreboot/+/47989 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/amd/cezanne/bootblock.c')
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