diff options
author | Shelley Chen <shchen@google.com> | 2024-02-01 13:17:08 -0800 |
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committer | Shelley Chen <shchen@google.com> | 2024-02-09 17:56:02 +0000 |
commit | 9f297080aa1ec6b45551f7a177a21394e627c3e2 (patch) | |
tree | f72d094af87ffe538091a529647ea077122584d6 /src/soc/amd/cezanne/Makefile.mk | |
parent | 344ebf1f81db4219ad44b5d578c464b4bd8820a5 (diff) |
mb/google/brox: Initialize TCHSCR_RST_L to 0
TCHSCR_RST_L signal was originally being configured to 1 in gpio.c but
this was causing some leakage. Configuring it to 0 initially in
romstage fixes this. Also, make sure that EN_PP3300_TCHSCR is
initialized in romstage as well.
BUG=b:322249892
BRANCH=None
TEST=Make brox boots and touchscreen is still working
Change-Id: I5bf1901a3a40a38237b950abcb758f96aebcc1cf
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80300
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/cezanne/Makefile.mk')
0 files changed, 0 insertions, 0 deletions