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authorRaul E Rangel <rrangel@chromium.org>2021-02-12 16:57:49 -0700
committerPatrick Georgi <pgeorgi@google.com>2021-02-15 08:22:27 +0000
commitf41ca1ed76f6bffdfdec2b84263380ef08342b09 (patch)
tree8a70cf1c930d173164f27051873266a39ba4b858 /src/soc/amd/cezanne/Makefile.inc
parentec38570ead077f6fe37c017c857915ea6cca3951 (diff)
soc/amd/cezanne: Add uart.c to smm so we can support DEBUG_SMI
Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Ife43352db564654ed538383a157431ee10856518 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50617 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd/cezanne/Makefile.inc')
-rw-r--r--src/soc/amd/cezanne/Makefile.inc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc
index 697d412464..589e760bf7 100644
--- a/src/soc/amd/cezanne/Makefile.inc
+++ b/src/soc/amd/cezanne/Makefile.inc
@@ -37,6 +37,7 @@ ramstage-y += root_complex.c
ramstage-y += uart.c
smm-y += smihandler.c
+smm-$(CONFIG_DEBUG_SMI) += uart.c
CPPFLAGS_common += -I$(src)/soc/amd/cezanne/include
CPPFLAGS_common += -I$(src)/soc/amd/cezanne/acpi