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authorFelix Held <felix-coreboot@felixheld.de>2020-12-05 01:39:28 +0100
committerFelix Held <felix-coreboot@felixheld.de>2020-12-06 19:05:47 +0000
commitc8272783db8b8a8fe66e1bd1fe60a37532b6b071 (patch)
tree9f815ae3200215cd4a13503ea8ce11e5c4d01961 /src/soc/amd/cezanne/Makefile.inc
parent04f079d396631ff7154b3a750ba0a92adbf5c562 (diff)
soc/amd/cezanne: add config.c and minimal chip.h
Change-Id: I89f08c201bd7d9a11b186ef960abe9714a76fb97 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48317 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/cezanne/Makefile.inc')
-rw-r--r--src/soc/amd/cezanne/Makefile.inc2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc
index d4f585fed8..df3355e77b 100644
--- a/src/soc/amd/cezanne/Makefile.inc
+++ b/src/soc/amd/cezanne/Makefile.inc
@@ -2,6 +2,8 @@
ifeq ($(CONFIG_SOC_AMD_CEZANNE),y)
+all-y += config.c
+
bootblock-y += bootblock.c
romstage-y += romstage.c