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authorFelix Held <felix-coreboot@felixheld.de>2021-02-05 22:51:33 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-02-09 20:46:50 +0000
commit060b8ad7a324d8aada887133fd1222a9d66c678b (patch)
treee7c04ddce798a38205b7c5edd507d6fc9baabfef /src/soc/amd/cezanne/Makefile.inc
parentccf99a39d202535ceaa19493f7f762116efc8d50 (diff)
soc/amd/cezanne: add empty CPU driver
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I54299cadae4cb562e04a16c3b8e051c9c454db79 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50404 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/cezanne/Makefile.inc')
-rw-r--r--src/soc/amd/cezanne/Makefile.inc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc
index 7f59ef495e..9a59d5dabc 100644
--- a/src/soc/amd/cezanne/Makefile.inc
+++ b/src/soc/amd/cezanne/Makefile.inc
@@ -25,6 +25,7 @@ romstage-y += romstage.c
romstage-y += uart.c
ramstage-y += chip.c
+ramstage-y += cpu.c
ramstage-y += fch.c
ramstage-y += fsp_params.c
ramstage-y += gpio.c