summaryrefslogtreecommitdiff
path: root/src/soc/amd/cezanne/Makefile.inc
diff options
context:
space:
mode:
authorFelix Held <felix-coreboot@felixheld.de>2020-12-09 23:04:29 +0100
committerFelix Held <felix-coreboot@felixheld.de>2020-12-13 22:18:03 +0000
commitdffdea8a76e6ebc0f94ad25083983ae538f1d077 (patch)
tree6367e57fbe58a2f94c309fd48ad511ed7b465435 /src/soc/amd/cezanne/Makefile.inc
parent7584e550ccba903903be6603f50dc8519a382564 (diff)
soc/amd/cezanne: add caching setup in bootblock
The code can likely be factored out to common code, but since I'm not entirely sure yet that there will be no differences, I'll copy for now instead. Change-Id: I5fc158518cf9534ab9727f3305abeb4b34049e76 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48517 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/cezanne/Makefile.inc')
-rw-r--r--src/soc/amd/cezanne/Makefile.inc2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc
index 353bdbe891..2852b6a652 100644
--- a/src/soc/amd/cezanne/Makefile.inc
+++ b/src/soc/amd/cezanne/Makefile.inc
@@ -2,6 +2,8 @@
ifeq ($(CONFIG_SOC_AMD_CEZANNE),y)
+subdirs-y += ../../../cpu/x86/mtrr
+
# Beware that all-y also adds the compilation unit to verstage on PSP
all-y += config.c