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authorJonathan Zhang <jonzhang@meta.com>2023-01-30 12:11:52 -0800
committerLean Sheng Tan <sheng.tan@9elements.com>2023-03-22 12:07:19 +0000
commit907b6f54ef8363b5dea404aa57d86eef342ccfb7 (patch)
treed434bebe3ee77e652962251ced83dda6009d44fd /src/security
parenta5bd580b5f75bfd0685ecf8705557bdb45712461 (diff)
soc/intel/xeon_sp/uncore.c: Add CXL memory into memory map
If the host supports CXL, get proximity domain info from FSP HOB. The proximity domains may include both processor domains and CXL domains. Add header definition for proximity domain. Add CXL memory into memory map. Change-Id: If3f856958a3e6ed3909240ee455bb639e487087f Signed-off-by: Jonathan Zhang <jonzhang@meta.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72617 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
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