diff options
| author | Philipp Deppenwiese <zaolin@das-labor.org> | 2018-02-27 19:40:52 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-06-04 20:33:07 +0000 |
| commit | c07f8fbe6fd13e4245da71574b52b47e9733db84 (patch) | |
| tree | 12db8b3c40552eab81045c6165538e2d3ba36ce8 /src/security/tpm/Makefile.inc | |
| parent | 961d31bdb3c97e177156ed335d6f2c726d08ab51 (diff) | |
security/tpm: Unify the coreboot TPM software stack
* Remove 2nd software stack in pc80 drivers directory.
* Create TSPI interface for common usage.
* Refactor TSS / TIS code base.
* Add vendor tss (Cr50) directory.
* Change kconfig options for TPM to TPM1.
* Add user / board configuration with:
* MAINBOARD_HAS_*_TPM # * BUS driver
* MAINBOARD_HAS_TPM1 or MAINBOARD_HAS_TPM2
* Add kconfig TPM user selection (e.g. pluggable TPMs)
* Fix existing headers and function calls.
* Fix vboot for interface usage and antirollback mode.
Change-Id: I7ec277e82a3c20c62a0548a1a2b013e6ce8f5b3f
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: https://review.coreboot.org/24903
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/security/tpm/Makefile.inc')
| -rw-r--r-- | src/security/tpm/Makefile.inc | 51 |
1 files changed, 41 insertions, 10 deletions
diff --git a/src/security/tpm/Makefile.inc b/src/security/tpm/Makefile.inc index 2385635f32..9157fec386 100644 --- a/src/security/tpm/Makefile.inc +++ b/src/security/tpm/Makefile.inc @@ -1,14 +1,45 @@ +subdirs-$(CONFIG_TPM_CR50) += tss/vendor/cr50 + ## TSS -verstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c -verstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss_marshaling.c -verstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss.c +ifeq ($(CONFIG_TPM1),y) + +ramstage-y += tss/tcg-1.2/tss.c +romstage-y += tss/tcg-1.2/tss.c + +verstage-$(CONFIG_VBOOT) += tss/tcg-1.2/tss.c +postcar-$(CONFIG_VBOOT) += tss/tcg-1.2/tss.c + +## TSPI + +ramstage-y += tspi/tspi.c +romstage-y += tspi/tspi.c + +verstage-$(CONFIG_VBOOT) += tspi/tspi.c +postcar-$(CONFIG_VBOOT) += tspi/tspi.c + +endif # CONFIG_TPM1 + +ifeq ($(CONFIG_TPM2),y) + +ramstage-y += tss/tcg-2.0/tss_marshaling.c +ramstage-y += tss/tcg-2.0/tss.c + +romstage-y += tss/tcg-2.0/tss_marshaling.c +romstage-y += tss/tcg-2.0/tss.c + +verstage-$(CONFIG_VBOOT) += tss/tcg-2.0/tss_marshaling.c +verstage-$(CONFIG_VBOOT) += tss/tcg-2.0/tss.c + +postcar-$(CONFIG_VBOOT) += tss/tcg-2.0/tss_marshaling.c +postcar-$(CONFIG_VBOOT) += tss/tcg-2.0/tss.c + +## TSPI + +ramstage-y += tspi/tspi.c +romstage-y += tspi/tspi.c -ifeq ($(CONFIG_VBOOT_SEPARATE_VERSTAGE),y) -romstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c -romstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss_marshaling.c -romstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss.c -endif # CONFIG_VBOOT_SEPARATE_VERSTAGE +verstage-$(CONFIG_VBOOT) += tspi/tspi.c +postcar-$(CONFIG_VBOOT) += tspi/tspi.c -ramstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss_marshaling.c -ramstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss.c +endif # CONFIG_TPM2 |