diff options
| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2021-11-21 12:50:48 +0100 |
|---|---|---|
| committer | Michał Żygowski <michal.zygowski@3mdeb.com> | 2021-11-27 14:14:00 +0000 |
| commit | de8c8eccc46f20ff4703768318af141a1174d1c0 (patch) | |
| tree | 787130f40398fab1e7c48e0752b209270c928e64 /src/security/intel | |
| parent | 7480e87d7614df4391d6c86c72502a4b7cdd2041 (diff) | |
security/intel/txt: Use set_global_reset in txt_reset_platform if possible
Allow to set global reset bits on other platforms which enable
SOUTHBRIDGE_INTEL_COMMON_ME. In certain Intel TXT flows global reset
instead of full power cycle reset is needed.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I561458044860ee5a26f7d61bcff1c407fa1533f2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59517
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/security/intel')
| -rw-r--r-- | src/security/intel/txt/common.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/security/intel/txt/common.c b/src/security/intel/txt/common.c index 18dbe06b1d..61ff0eb5eb 100644 --- a/src/security/intel/txt/common.c +++ b/src/security/intel/txt/common.c @@ -16,6 +16,9 @@ #if CONFIG(SOC_INTEL_COMMON_BLOCK_SA) #include <soc/intel/common/reset.h> #else +#if CONFIG(SOUTHBRIDGE_INTEL_COMMON_ME) +#include <southbridge/intel/common/me.h> +#endif #include <cf9_reset.h> #endif @@ -29,6 +32,9 @@ static void __noreturn txt_reset_platform(void) #if CONFIG(SOC_INTEL_COMMON_BLOCK_SA) global_reset(); #else +#if CONFIG(SOUTHBRIDGE_INTEL_COMMON_ME) + set_global_reset(1); +#endif full_reset(); #endif } |