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| author | Tim Crawford <tcrawford@system76.com> | 2022-07-12 13:16:56 -0600 |
|---|---|---|
| committer | Martin L Roth <gaumless@tutanota.com> | 2022-07-16 22:55:54 +0000 |
| commit | 205e7f676d3e65bf99ca27107cef34ee0a8a4049 (patch) | |
| tree | 13cc84cc7c5adb1afdfbe2ee3f1c0498297733f4 /src/security/intel | |
| parent | 4060df41b2fa706cf9d674c84fa6443426d0b4d3 (diff) | |
mb/system76/oryp5: Configure dGPU GPIOs in bootblock
Configure the dGPU power and reset pins in bootblock instead of
ramstage. This fixes a conflict with our downstream driver, which
configures these pins to enable dGPU power in romstage. Behavior remains
unchanged without the driver as the dGPU is left powered off.
Change-Id: Ica5ad5adc20fc2629d913b76a5a781fbd59a569d
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65801
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/security/intel')
0 files changed, 0 insertions, 0 deletions