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authorElyes HAOUAS <ehaouas@noos.fr>2020-08-26 09:22:45 +0200
committerMichael Niewöhner <foss@mniewoehner.de>2020-09-21 16:26:17 +0000
commitf91bcb310bae7478104304bd18c75cdd73a1e229 (patch)
tree634e3dc37b7abd793dc6ee203f37d64674768655 /src/security/intel
parent4b7f3151a860b996bc5d42d3513c302d67f08f47 (diff)
src/security: Drop unneeded empty lines
Change-Id: Icb6057ac73fcc038981ef95a648420ac00b3c106 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44808 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/security/intel')
-rw-r--r--src/security/intel/stm/StmPlatformSmm.c2
-rw-r--r--src/security/intel/txt/txt_register.h1
2 files changed, 0 insertions, 3 deletions
diff --git a/src/security/intel/stm/StmPlatformSmm.c b/src/security/intel/stm/StmPlatformSmm.c
index 9eccb32faa..eb9a0bb22f 100644
--- a/src/security/intel/stm/StmPlatformSmm.c
+++ b/src/security/intel/stm/StmPlatformSmm.c
@@ -73,7 +73,6 @@ struct descriptor {
uintptr_t base;
} __attribute__((packed));
-
static void read_gdtr(struct descriptor *gdtr)
{
__asm__ __volatile__("sgdt %0" : "=m"(*gdtr));
@@ -118,7 +117,6 @@ void setup_smm_descriptor(void *smbase, void *base_smbase, int32_t apic_id,
psd->smm_other_segment = ROM_DATA_SEG;
psd->smm_tr = SMM_TASK_STATE_SEG;
-
// At this point the coreboot smm_stub is relative to the default
// smbase and not the one for the smi handler in tseg. So we have
// to adjust the gdtr.base
diff --git a/src/security/intel/txt/txt_register.h b/src/security/intel/txt/txt_register.h
index 688221f395..c7f1575ce7 100644
--- a/src/security/intel/txt/txt_register.h
+++ b/src/security/intel/txt/txt_register.h
@@ -267,7 +267,6 @@ struct __packed txt_biosdataregion {
u8 extended_data_elements[0];
};
-
void txt_dump_regions(void);
void txt_dump_chipset_info(void);
void txt_dump_acm_info(const struct acm_header_v0 *acm_header);