summaryrefslogtreecommitdiff
path: root/src/security/intel/txt/txtlib.c
diff options
context:
space:
mode:
authorElyes Haouas <ehaouas@noos.fr>2024-01-28 11:13:51 +0100
committerFelix Held <felix-coreboot@felixheld.de>2024-01-30 12:27:29 +0000
commit1ece68a4b9d095c892ec0b1e7453d2ea21099b8b (patch)
tree90ddae08f300fb66997a229631e2405361d1ef4d /src/security/intel/txt/txtlib.c
parentf67005db0abbe5793c00c5f8b968e84a52c28ab1 (diff)
security/intel: Use write{64,32,16,8}p and read{64,32,16,8}p
Change-Id: I4bdfcd0cc0e2d9b5f884ea7275659c12488715e0 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80194 Reviewed-by: Eric Lai <ericllai@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/security/intel/txt/txtlib.c')
-rw-r--r--src/security/intel/txt/txtlib.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/security/intel/txt/txtlib.c b/src/security/intel/txt/txtlib.c
index 5478206ee2..6ce86a3e91 100644
--- a/src/security/intel/txt/txtlib.c
+++ b/src/security/intel/txt/txtlib.c
@@ -20,7 +20,7 @@ bool is_establishment_bit_asserted(void)
stopwatch_init_msecs_expire(&timer, 50);
while (true) {
- access = read8((void *)TPM_ACCESS_REG);
+ access = read8p(TPM_ACCESS_REG);
/* Register returns all ones if TPM is missing */
if (access == 0xff)