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authorPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2018-11-20 14:22:15 +0100
committerPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2020-07-31 16:02:54 +0000
commit5f9f77672d096a013094f3cad63cb138167dbf1b (patch)
treee3dd64faa6844b1e577651eff519a67fc1add1d8 /src/security/intel/txt/Kconfig
parenta9eec2cc2f941d6e4035620e60c1a0ae93d5167e (diff)
security/intel/txt: Add Intel TXT support
Add TXT ramstage driver: * Show startup errors * Check for TXT reset * Check for Secrets-in-memory * Add assembly for GETSEC instruction * Check platform state if GETSEC instruction is supported * Configure TXT memory regions * Lock TXT * Protect TSEG using DMA protected regions * Place SINIT ACM * Print information about ACMs Extend the `security_clear_dram_request()` function: * Clear all DRAM if secrets are in memory Add a config so that the code gets build-tested. Since BIOS and SINIT ACM binaries are not available, use the STM binary as a placeholder. Tested on OCP Wedge100s and Facebook Watson * Able to enter a Measured Launch Environment using SINIT ACM and TBOOT * Secrets in Memory bit is set on ungraceful shutdown * Memory is cleared after ungraceful shutdown Change-Id: Iaf4be7f016cc12d3971e1e1fe171e6665e44c284 Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37016 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Christian Walter <christian.walter@9elements.com>
Diffstat (limited to 'src/security/intel/txt/Kconfig')
-rw-r--r--src/security/intel/txt/Kconfig28
1 files changed, 23 insertions, 5 deletions
diff --git a/src/security/intel/txt/Kconfig b/src/security/intel/txt/Kconfig
index 732f3d3c67..edb13a51b5 100644
--- a/src/security/intel/txt/Kconfig
+++ b/src/security/intel/txt/Kconfig
@@ -19,7 +19,7 @@ config INTEL_TXT_BIOSACM_FILE
string "BIOS ACM file"
default "3rdparty/blobs/soc/intel/skylake/biosacm.bin" if SOC_INTEL_COMMON_SKYLAKE_BASE
help
- Intel TXT BIOS ACM file. This file can be obtained by privileged
+ Intel TXT BIOS ACM file. This file can be obtained through privileged
access to Intel resources. Or for some platforms found inside the
blob repository.
@@ -27,16 +27,34 @@ config INTEL_TXT_SINITACM_FILE
string "SINIT ACM file"
default "3rdparty/blobs/soc/intel/skylake/sinitacm.bin" if SOC_INTEL_COMMON_SKYLAKE_BASE
help
- Intel TXT SINIT ACM file. This file can be obtained by privileged
+ Intel TXT SINIT ACM file. This file can be obtained through privileged
access to Intel resources. Or for some platforms found inside the
blob repository.
+config INTEL_TXT_LOGGING
+ bool "Enable verbose logging"
+ help
+ Print more TXT related debug output.
+ Use in pre-production environments only!
+
config INTEL_TXT_BIOSACM_ALIGNMENT
hex
- default 0x20000 # 128KB
+ default 0x20000 # 128 KiB
help
- Exceptions are Ivy- and Sandy Bridge with 64KB and Purely with 256KB
- alignment size. Please overwrite it SoC specific.
+ Exceptions are Ivy and Sandy Bridge with 64 KiB and Purley with 256 KiB
+ alignment size. If necessary, override from platform-specific Kconfig.
+
+config INTEL_TXT_CBFS_BIOS_POLICY
+ string
+ default "txt_bios_policy.bin"
+
+config INTEL_TXT_CBFS_BIOS_ACM
+ string
+ default "txt_bios_acm.bin"
+
+config INTEL_TXT_CBFS_SINIT_ACM
+ string
+ default "txt_sinit_acm.bin"
endmenu # Intel