mb/supermicro/x11ssm-f: (re)configure and document various pads

(Re)configure various pads found by dissecting a dead board and vendor
firmware, as well as the BMC firmware:

- GPP_B14: input connected to jumper JBR1 - could be used to implement
  "BIOS Recovery" ("Top-Block Swap") functionality; external pull-up

- GPP_C20: output to BMC alert CPU_THROTTLED# - can be used to notify
  the BMC about a thermal throttling event. Not implemented in vendor
  firmware.

- GPP_C23: input connected to the CPU's CATERR# output; external pull-up
  Not actively used by vendor firmware.

- GPP_D1: output connected to on-board and front panel power LEDs

- GPP_D18: output connected to PERST# of both CPU PCIe Slots. Can be
  used for testing/debugging only, since it resets both slots at once.
  Not actively used by vendor firmware.

- GPP_D19: output connected to PERST# of both PCH PCIe Slots. Can be
  used for testing/debugging only, since it resets both slots at once.
  Not actively used by vendor firmware.

- GPP_D22: input connected to the BMC enable/disable jumper JPB1; Will
  be used later in CB:48096 and CB:48097; external pull-up

- GPP_G0 - GPP_G3: dedicated/integrated CPU switching; probably not
  useful, since the IGD is not connected to any ports on this board.
  External pulls ensure correct function of a dGPU even without driving
  the gpios. Not used by vendor firmware.

- GPP_G12 - GPP_G16: inputs for binary SKU_ID; external pulls

- GPP_G20: PWRFAIL# input from JPI2C1 (pin 3); external pull-up; Not
  used by vendor firmware.

Also add comments for documentation. While at it, mark ME-owned pads as
reserved.

Change-Id: I9f9328e9ce6f7e291b171f776bb98bc617b64b93
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48098
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Christian Walter <christian.walter@9elements.com>

0 files changed, 0 insertions, 0 deletions