summaryrefslogtreecommitdiff
path: root/src/sdram
diff options
context:
space:
mode:
authorarch import user (historical) <svn@openbios.org>2005-07-06 17:17:25 +0000
committerarch import user (historical) <svn@openbios.org>2005-07-06 17:17:25 +0000
commit6ca7636c8f52560e732cdd5b1c7829cda5aa2bde (patch)
treecc45ae7c4dea6e2c5338f52b4314106bf07023be /src/sdram
parentb2ed53dd5669c2c3839633bd2b3b4af709a5b149 (diff)
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51
Creator: Yinghai Lu <yhlu@tyan.com> cache_as_ram for AMD and some intel git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/sdram')
-rw-r--r--src/sdram/generic_sdram.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/sdram/generic_sdram.c b/src/sdram/generic_sdram.c
index 9ec8122afe..da14166958 100644
--- a/src/sdram/generic_sdram.c
+++ b/src/sdram/generic_sdram.c
@@ -12,17 +12,25 @@ void sdram_initialize(int controllers, const struct mem_controller *ctrl)
int i;
/* Set the registers we can set once to reasonable values */
for(i = 0; i < controllers; i++) {
+#if CONFIG_USE_INIT
+ printk_debug("Ram1.%02x\r\n",i);
+#else
print_debug("Ram1.");
print_debug_hex8(i);
print_debug("\r\n");
+#endif
sdram_set_registers(ctrl + i);
}
/* Now setup those things we can auto detect */
for(i = 0; i < controllers; i++) {
+#if CONFIG_USE_INIT
+ printk_debug("Ram2.%02x\r\n",i);
+#else
print_debug("Ram2.");
print_debug_hex8(i);
print_debug("\r\n");
+#endif
sdram_set_spd_registers(ctrl + i);
}