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authorAshish Kumar Mishra <ashish.k.mishra@intel.com>2024-03-12 10:54:38 +0530
committerFelix Held <felix-coreboot@felixheld.de>2024-04-02 12:39:39 +0000
commit4dcf4af010baf70d13abcbf07d9a7784b92a39b6 (patch)
treea2e0a52c045aa76206ab609055ec02c4c0e0d5aa /src/sbom/payload-depthcharge.json
parente644fa5b7c46900bdaad8d6596777fee52033716 (diff)
mb/google/brox: Enable PMC pins to work with PD
Enable SMLINK1 interface for PMC-PD communication to configure Type-C muxes. Refer RPL EDS vol 1: 765585. BUG=b:327622474 BRANCH=None TEST=Boot image on SKU2 and check PMC-PD working. Change-Id: Ia678d291e7a14aefe09026e70478fea3f68c8e10 Signed-off-by: Ashish Kumar Mishra <ashish.k.mishra@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81207 Reviewed-by: Eric Lai <ericllai@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Deepti Deshatty <deepti.deshatty@intel.com>
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