diff options
| author | Eric Biederman <ebiederm@xmission.com> | 2003-04-22 19:02:15 +0000 |
|---|---|---|
| committer | Eric Biederman <ebiederm@xmission.com> | 2003-04-22 19:02:15 +0000 |
| commit | 8ca8d7665d671e10d72b8fcb4d69121d75f7906e (patch) | |
| tree | daad2699b4e6b6014bce5a76e82dd9c974801777 /src/pc80/serial.inc | |
| parent | b138ac83b53da9abf3dc9a87a1cd4b3d3a8150bd (diff) | |
- Initial checkin of the freebios2 tree
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/pc80/serial.inc')
| -rw-r--r-- | src/pc80/serial.inc | 106 |
1 files changed, 106 insertions, 0 deletions
diff --git a/src/pc80/serial.inc b/src/pc80/serial.inc new file mode 100644 index 0000000000..b0f12699e1 --- /dev/null +++ b/src/pc80/serial.inc @@ -0,0 +1,106 @@ +#include <part/fallback_boot.h> + + +/* Base Address */ +#ifndef TTYS0_BASE +#define TTYS0_BASE 0x3f8 +#endif + +/* Baud Rate */ +#ifndef TTYS0_BAUD +#define TTYS0_BAUD 115200 +#endif + +#if ((115200%TTYS0_BAUD) != 0) +#error Bad ttys0 baud rate +#endif + +/* Baud Rate Divisor */ +#define TTYS0_DIV (115200/TTYS0_BAUD) +#define TTYS0_DIV_LO (TTYS0_DIV&0xFF) +#define TTYS0_DIV_HI ((TTYS0_DIV >> 8)&0xFF) + +/* Line Control Settings */ +#ifndef TTYS0_LCS +/* Set 8bit, 1 stop bit, no parity */ +#define TTYS0_LCS 0x3 +#endif + +/* Data */ +#define TTYS0_RBR (TTYS0_BASE+0x00) + +/* Control */ +#define TTYS0_TBR TTYS0_RBR +#define TTYS0_IER (TTYS0_BASE+0x01) +#define TTYS0_IIR (TTYS0_BASE+0x02) +#define TTYS0_FCR TTYS0_IIR +#define TTYS0_LCR (TTYS0_BASE+0x03) +#define TTYS0_MCR (TTYS0_BASE+0x04) +#define TTYS0_DLL TTYS0_RBR +#define TTYS0_DLM TTYS0_IER + +/* Status */ +#define TTYS0_LSR (TTYS0_BASE+0x05) +#define TTYS0_MSR (TTYS0_BASE+0x06) +#define TTYS0_SCR (TTYS0_BASE+0x07) + +#if USE_OPTION_TABLE == 1 +.section ".rom.data" + .type div,@object + .size div,8 +div: +.byte 1,2,3,6,12,24,48,96 + +.previous +#endif + + jmp serial0 + + /* uses: ax, dx */ +#define TTYS0_TX_AL \ + mov %al, %ah ; \ +9: mov $TTYS0_LSR, %dx ; \ + inb %dx, %al ; \ + test $0x20, %al ; \ + je 9b ; \ + mov $TTYS0_TBR, %dx ; \ + mov %ah, %al ; \ + outb %al, %dx + + +serial0: + /* Set 115.2Kbps,8n1 */ + /* Set 8bit, 1 stop bit, no parity, DLAB */ + mov $TTYS0_LCR, %dx + mov $(TTYS0_LCS | 0x80), %al + out %al, %dx + + /* set Baud Rate Divisor to 1 ==> 115200 Buad */ +#if USE_OPTION_TABLE == 1 + + movb $(RTC_BOOT_BYTE+1), %al + outb %al, $0x70 + xorl %edx,%edx + inb $0x71, %al + andb $7,%al + movb %al,%dl + movb div(%edx),%al + mov $TTYS0_DLL, %dx + out %al, %dx + mov $TTYS0_DLM, %dx + xorb %al,%al + out %al, %dx +#else + mov $TTYS0_DLL, %dx + mov $TTYS0_DIV_LO, %al + out %al, %dx + mov $TTYS0_DLM, %dx + mov $TTYS0_DIV_HI, %al + out %al, %dx +#endif + /* Disable DLAB */ + mov $TTYS0_LCR, %dx + mov $(TTYS0_LCS & 0x7f), %al + out %al, %dx + + |