diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-12-16 22:42:19 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-12-19 13:15:39 +0000 |
| commit | df4955297f8fd798c1faf61cf92577edd4b2a7ce (patch) | |
| tree | f35837b327b49ffeee26507d3651142314dd0e15 /src/northbridge | |
| parent | 7a83ab7612148e17bee158fcb933674340021bff (diff) | |
nb/amd/pi: drop HW_MEM_HOLE_SIZEK Kconfig option
There's neither need to remove get_hw_mem_hole_info from the code if the
Kconfig option was set to 0 nor the actual value didn't make any
difference in the behavior of the code: When node_id has still its
initial value of -1, domain_read_resources won't use the value of
hole_startk, and when node_id is set to 0, get_hw_mem_hole_info also
sets hole_startk to the actual value that then gets used by
domain_read_resources.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ieffab695a3151ed7f6bf9d6c880bbb43eecf7893
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79609
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/pi/00730F01/Kconfig | 4 | ||||
| -rw-r--r-- | src/northbridge/amd/pi/00730F01/northbridge.c | 7 | ||||
| -rw-r--r-- | src/northbridge/amd/pi/Kconfig | 4 |
3 files changed, 0 insertions, 15 deletions
diff --git a/src/northbridge/amd/pi/00730F01/Kconfig b/src/northbridge/amd/pi/00730F01/Kconfig index 493bc6a13e..46acb2d59d 100644 --- a/src/northbridge/amd/pi/00730F01/Kconfig +++ b/src/northbridge/amd/pi/00730F01/Kconfig @@ -10,10 +10,6 @@ config CHIPSET_DEVICETREE string default "northbridge/amd/pi/00730F01/chipset.cb" -config HW_MEM_HOLE_SIZEK - hex - default 0x100000 - config ECAM_MMCONF_BASE_ADDRESS default 0xF8000000 diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index 9b535f477e..dae2401ea6 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -555,7 +555,6 @@ static void fam16_finalize(void *chip_info) } } -#if CONFIG_HW_MEM_HOLE_SIZEK != 0 struct hw_mem_hole_info { unsigned int hole_startk; int node_id; @@ -563,7 +562,6 @@ struct hw_mem_hole_info { static struct hw_mem_hole_info get_hw_mem_hole_info(void) { struct hw_mem_hole_info mem_hole; - mem_hole.hole_startk = CONFIG_HW_MEM_HOLE_SIZEK; mem_hole.node_id = -1; resource_t basek, limitk; @@ -576,15 +574,12 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void) } return mem_hole; } -#endif static void domain_read_resources(struct device *dev) { unsigned long mmio_basek; unsigned long idx = 0; -#if CONFIG_HW_MEM_HOLE_SIZEK != 0 struct hw_mem_hole_info mem_hole; -#endif resource_t basek = 0; resource_t limitk = 0; resource_t sizek; @@ -594,7 +589,6 @@ static void domain_read_resources(struct device *dev) /* TOP_MEM MSR is our boundary between DRAM and MMIO under 4G */ mmio_basek = get_top_of_mem_below_4gb() >> 10; -#if CONFIG_HW_MEM_HOLE_SIZEK != 0 /* if the hw mem hole is already set in raminit stage, here we will compare * mmio_basek and hole_basek. if mmio_basek is bigger that hole_basek and will * use hole_basek as mmio_basek and we don't need to reset hole. @@ -607,7 +601,6 @@ static void domain_read_resources(struct device *dev) if ((mem_hole.node_id != -1) && (mmio_basek > mem_hole.hole_startk)) { mmio_basek = mem_hole.hole_startk; } -#endif get_dram_base_limit(&basek, &limitk); sizek = limitk - basek; diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig index 4518db149b..322219860d 100644 --- a/src/northbridge/amd/pi/Kconfig +++ b/src/northbridge/amd/pi/Kconfig @@ -25,10 +25,6 @@ config S3_VGA_ROM_RUN source "src/northbridge/amd/pi/00730F01/Kconfig" -config HW_MEM_HOLE_SIZEK - hex - default 0x200000 - config HEAP_SIZE hex default 0xc0000 |