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authorElyes HAOUAS <ehaouas@noos.fr>2019-01-24 11:47:27 +0100
committerNico Huber <nico.h@gmx.de>2019-01-27 10:40:35 +0000
commitd3fa7fa5d810688cdcdb7c34b7f13ae1350a0f84 (patch)
treebebc65bb0e2c613952efacc2435e47484cb37dda /src/northbridge
parent3452eca26dd8cda859636044efbb56e4a73d48a4 (diff)
nb/intel/i945: Fix typo on DMIBAR32(0x334)
Change-Id: Ib894c24bc787c6c211da26dca78bcd330ded6681 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/31063 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/i945/early_init.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index 763300aee8..b82812e6d1 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -530,7 +530,7 @@ static void i945_setup_dmi_rcrb(void)
DMIBAR32(0x314) = DMIBAR32(0x314);
DMIBAR32(0x324) = DMIBAR32(0x324);
DMIBAR32(0x328) = DMIBAR32(0x328);
- DMIBAR32(0x338) = DMIBAR32(0x334);
+ DMIBAR32(0x334) = DMIBAR32(0x334);
DMIBAR32(0x338) = DMIBAR32(0x338);
if (i945_silicon_revision() == 1 && (MCHBAR8(DFT_STRAP1) & (1 << 5))) {