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authorAaron Durbin <adurbin@chromium.org>2012-11-02 09:10:30 -0500
committerRonald G. Minnich <rminnich@gmail.com>2013-03-14 06:33:32 +0100
commitb9ea8b3fb0082840b0c9d449535f4c49c2e885ac (patch)
tree32df5c3cf78aca3c9f737312c8a60998a1498f62 /src/northbridge
parent9aa031e47157e37e8f3cd80cbc80215e2843eaa9 (diff)
lynxpoint: PMIR register rename
The register that controls global reset is named the Power Mangement Initialization Regiser (PMIR). Update the defines to reflect the documentation. Additionally, there is no core well reset control according to the EDS. There is, however, a CF9 lock field to lock this register down. Change-Id: I773c33bec63a06cdb869eb9f94553d476e492798 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/2619 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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