AGESA binaryPI: Use common acpi_fill_madt()

Change-Id: I01ee0ba99eca6ad4c01848ab133166f8c922684d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55569
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

8 files changed, 129 insertions, 0 deletions

diff --git a/src/northbridge/amd/agesa/family14/Makefile.inc b/src/northbridge/amd/agesa/family14/Makefile.inc
index adcb86b34f..e387ee5d24 100644
--- a/src/northbridge/amd/agesa/family14/Makefile.inc
+++ b/src/northbridge/amd/agesa/family14/Makefile.inc
@@ -3,6 +3,7 @@
 romstage-y += dimmSpd.c
 
 ramstage-y += northbridge.c
+ramstage-y += acpi_tables.c
 
 romstage-y += state_machine.c
 ramstage-y += state_machine.c
diff --git a/src/northbridge/amd/agesa/family14/acpi_tables.c b/src/northbridge/amd/agesa/family14/acpi_tables.c
new file mode 100644
index 0000000000..f75f823f38
--- /dev/null
+++ b/src/northbridge/amd/agesa/family14/acpi_tables.c
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+#include <arch/ioapic.h>
+
+unsigned long acpi_fill_madt(unsigned long current)
+{
+	/* create all subtables for processors */
+	current = acpi_create_madt_lapics(current);
+
+	/* Write SB800 IOAPIC, only one */
+	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
+			CONFIG_MAX_CPUS, IO_APIC_ADDR, 0);
+
+	current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
+			current, 0, 0, 2, 0);
+	current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
+			current, 0, 9, 9, 0xF);
+
+	/* 0: mean bus 0--->ISA */
+	/* 0: PIC 0 */
+	/* 2: APIC 2 */
+	/* 5 mean: 0101 --> Edge-triggered, Active high */
+
+	/* create all subtables for processors */
+	/* current = acpi_create_madt_lapic_nmis(current, 5, 1); */
+	/* 1: LINT1 connect to NMI */
+
+	return current;
+}
diff --git a/src/northbridge/amd/agesa/family15tn/Makefile.inc b/src/northbridge/amd/agesa/family15tn/Makefile.inc
index a865929d87..5510363306 100644
--- a/src/northbridge/amd/agesa/family15tn/Makefile.inc
+++ b/src/northbridge/amd/agesa/family15tn/Makefile.inc
@@ -4,6 +4,7 @@ romstage-y += dimmSpd.c
 
 ramstage-y += iommu.c
 ramstage-y += northbridge.c
+ramstage-y += acpi_tables.c
 
 romstage-y += state_machine.c
 ramstage-y += state_machine.c
diff --git a/src/northbridge/amd/agesa/family15tn/acpi_tables.c b/src/northbridge/amd/agesa/family15tn/acpi_tables.c
new file mode 100644
index 0000000000..ff4a3b97b6
--- /dev/null
+++ b/src/northbridge/amd/agesa/family15tn/acpi_tables.c
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+#include <arch/ioapic.h>
+
+unsigned long acpi_fill_madt(unsigned long current)
+{
+	/* create all subtables for processors */
+	current = acpi_create_madt_lapics(current);
+
+	/* Write Hudson IOAPIC, only one */
+	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, CONFIG_MAX_CPUS,
+					   IO_APIC_ADDR, 0);
+
+	current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
+						current, 0, 0, 2, 0);
+	current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
+						current, 0, 9, 9, 0xF);
+	/* 0: mean bus 0--->ISA */
+	/* 0: PIC 0 */
+	/* 2: APIC 2 */
+	/* 5 mean: 0101 --> Edge-triggered, Active high */
+
+	/* create all subtables for processors */
+	current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 0xff, 5, 1);
+	/* 1: LINT1 connect to NMI */
+
+	return current;
+}
diff --git a/src/northbridge/amd/agesa/family16kb/Makefile.inc b/src/northbridge/amd/agesa/family16kb/Makefile.inc
index adcb86b34f..e387ee5d24 100644
--- a/src/northbridge/amd/agesa/family16kb/Makefile.inc
+++ b/src/northbridge/amd/agesa/family16kb/Makefile.inc
@@ -3,6 +3,7 @@
 romstage-y += dimmSpd.c
 
 ramstage-y += northbridge.c
+ramstage-y += acpi_tables.c
 
 romstage-y += state_machine.c
 ramstage-y += state_machine.c
diff --git a/src/northbridge/amd/agesa/family16kb/acpi_tables.c b/src/northbridge/amd/agesa/family16kb/acpi_tables.c
new file mode 100644
index 0000000000..2cc9bf58e1
--- /dev/null
+++ b/src/northbridge/amd/agesa/family16kb/acpi_tables.c
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+#include <arch/ioapic.h>
+
+unsigned long acpi_fill_madt(unsigned long current)
+{
+	/* create all subtables for processors */
+	current = acpi_create_madt_lapics(current);
+
+	/* Write SB800 IOAPIC, only one */
+	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, CONFIG_MAX_CPUS,
+					   IO_APIC_ADDR, 0);
+
+	/* TODO: Remove the hardcode */
+	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, CONFIG_MAX_CPUS+1,
+					   0xFEC20000, 24);
+
+	current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
+						current, 0, 0, 2, 0);
+	current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
+						current, 0, 9, 9, 0xF);
+	/* 0: mean bus 0--->ISA */
+	/* 0: PIC 0 */
+	/* 2: APIC 2 */
+	/* 5 mean: 0101 --> Edge-triggered, Active high */
+
+	/* create all subtables for processors */
+	current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 0xff, 5, 1);
+	/* 1: LINT1 connect to NMI */
+
+	return current;
+}
diff --git a/src/northbridge/amd/pi/00730F01/Makefile.inc b/src/northbridge/amd/pi/00730F01/Makefile.inc
index b97b335b70..8fc4ffce6e 100644
--- a/src/northbridge/amd/pi/00730F01/Makefile.inc
+++ b/src/northbridge/amd/pi/00730F01/Makefile.inc
@@ -4,6 +4,7 @@ romstage-y += dimmSpd.c
 
 ramstage-y += northbridge.c
 ramstage-y += iommu.c
+ramstage-y += acpi_tables.c
 
 romstage-y += state_machine.c
 ramstage-y += state_machine.c
diff --git a/src/northbridge/amd/pi/00730F01/acpi_tables.c b/src/northbridge/amd/pi/00730F01/acpi_tables.c
new file mode 100644
index 0000000000..2cc9bf58e1
--- /dev/null
+++ b/src/northbridge/amd/pi/00730F01/acpi_tables.c
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+#include <arch/ioapic.h>
+
+unsigned long acpi_fill_madt(unsigned long current)
+{
+	/* create all subtables for processors */
+	current = acpi_create_madt_lapics(current);
+
+	/* Write SB800 IOAPIC, only one */
+	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, CONFIG_MAX_CPUS,
+					   IO_APIC_ADDR, 0);
+
+	/* TODO: Remove the hardcode */
+	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, CONFIG_MAX_CPUS+1,
+					   0xFEC20000, 24);
+
+	current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
+						current, 0, 0, 2, 0);
+	current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
+						current, 0, 9, 9, 0xF);
+	/* 0: mean bus 0--->ISA */
+	/* 0: PIC 0 */
+	/* 2: APIC 2 */
+	/* 5 mean: 0101 --> Edge-triggered, Active high */
+
+	/* create all subtables for processors */
+	current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 0xff, 5, 1);
+	/* 1: LINT1 connect to NMI */
+
+	return current;
+}