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authorElyes Haouas <ehaouas@noos.fr>2022-12-25 06:40:52 +0100
committerFelix Singer <felixsinger@posteo.net>2022-12-26 08:51:55 +0000
commit9ede493c73aff7eb6f78ff18b341fb9a3c75b83d (patch)
tree8a43384091bdaf6284a9bb75769a6c1403f105bf /src/northbridge
parentf451bfb1a55192cd5e69a65e91ab5c8db6a36a0d (diff)
nb/intel/haswell/acpi: Replace Index(a, b) with ASL 2.0 syntax
Change-Id: I1ff0132e17b08f492828eb13d66e167eae45250d Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71505 Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/haswell/acpi/ctdp.asl2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/haswell/acpi/ctdp.asl b/src/northbridge/intel/haswell/acpi/ctdp.asl
index bc43a81e87..89669b3661 100644
--- a/src/northbridge/intel/haswell/acpi/ctdp.asl
+++ b/src/northbridge/intel/haswell/acpi/ctdp.asl
@@ -66,7 +66,7 @@ Scope (\_SB.PCI0.MCHC)
While (Local0 < Local1) {
/* Store _PSS entry Control value to Local2 */
- Local2 = DeRefOf (Index (DeRefOf (Index (\_SB.CP00._PSS, Local0)), 4)) >> 8
+ Local2 = DeRefOf (DeRefOf (\_SB.CP00._PSS[Local0])[4]) >> 8
If (Local2 == Arg0) {
Return (Local0 - 1)
}