diff options
| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-01-23 20:26:31 -0600 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-01-28 04:40:39 +0100 |
| commit | 82982a130c73d7a656a70303793cb7c9da7c12d9 (patch) | |
| tree | bd02a3482251331a78eda11145fe13179b9d8403 /src/northbridge | |
| parent | c139c42f3f37d8910893e8421bc3a665d99c8bdc (diff) | |
amd/amdfam10: Enhance resource debugging when enabled
Change-Id: Ie39652bded9a42d1d816ca5198db59a83e5c083a
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8266
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/amdfam10/setup_resource_map.c | 62 |
1 files changed, 31 insertions, 31 deletions
diff --git a/src/northbridge/amd/amdfam10/setup_resource_map.c b/src/northbridge/amd/amdfam10/setup_resource_map.c index ca7f96433c..b8a0923144 100644 --- a/src/northbridge/amd/amdfam10/setup_resource_map.c +++ b/src/northbridge/amd/amdfam10/setup_resource_map.c @@ -1,6 +1,7 @@ /* * This file is part of the coreboot project. * + * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering * Copyright (C) 2007 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify @@ -68,23 +69,17 @@ void setup_resource_map_x_offset(const u32 *register_values, u32 max, u32 offset { u32 i; -#if RES_DEBUG - printk(BIOS_DEBUG, "setting up resource map ex offset...."); + if (IS_ENABLED(RES_DEBUG)) + printk(BIOS_DEBUG, "setting up resource map ex offset....\n"); -#endif - -#if RES_DEBUG - printk(BIOS_DEBUG, "\n"); -#endif for(i = 0; i < max; i += 4) { -#if RES_DEBUG - printk(BIOS_DEBUG, "%04x: %02x %08x <- & %08x | %08x\n", - i/4, register_values[i], - register_values[i+1] + ( (register_values[i]==RES_PCI_IO) ? offset_pci_dev : 0), - register_values[i+2], - register_values[i+3] + ( ( (register_values[i] & RES_PORT_IO_32) == RES_PORT_IO_32) ? offset_io_base : 0) - ); -#endif + if (IS_ENABLED(RES_DEBUG)) + printk(BIOS_DEBUG, "%04x: %02x %08x <- & %08x | %08x\n", + i/4, register_values[i], + register_values[i+1] + ( (register_values[i]==RES_PCI_IO) ? offset_pci_dev : 0), + register_values[i+2], + register_values[i+3] + ( ( (register_values[i] & RES_PORT_IO_32) == RES_PORT_IO_32) ? offset_io_base : 0) + ); switch (register_values[i]) { case RES_PCI_IO: //PCI { @@ -94,9 +89,13 @@ void setup_resource_map_x_offset(const u32 *register_values, u32 max, u32 offset dev = (register_values[i+1] & ~0xfff) + offset_pci_dev; where = register_values[i+1] & 0xfff; reg = pci_read_config32(dev, where); + if (IS_ENABLED(RES_DEBUG)) + printk(BIOS_SPEW, "WAS: %08x\n", reg); reg &= register_values[i+2]; reg |= register_values[i+3]; pci_write_config32(dev, where, reg); + if (IS_ENABLED(RES_DEBUG)) + printk(BIOS_SPEW, "NOW: %08x\n", reg); } break; case RES_PORT_IO_8: // io 8 @@ -105,9 +104,13 @@ void setup_resource_map_x_offset(const u32 *register_values, u32 max, u32 offset u32 reg; where = register_values[i+1] + offset_io_base; reg = inb(where); + if (IS_ENABLED(RES_DEBUG)) + printk(BIOS_SPEW, "WAS: %08x\n", reg); reg &= register_values[i+2]; reg |= register_values[i+3]; outb(reg, where); + if (IS_ENABLED(RES_DEBUG)) + printk(BIOS_SPEW, "NOW: %08x\n", reg); } break; case RES_PORT_IO_32: //io32 @@ -116,9 +119,13 @@ void setup_resource_map_x_offset(const u32 *register_values, u32 max, u32 offset u32 reg; where = register_values[i+1] + offset_io_base; reg = inl(where); + if (IS_ENABLED(RES_DEBUG)) + printk(BIOS_SPEW, "WAS: %08x\n", reg); reg &= register_values[i+2]; reg |= register_values[i+3]; outl(reg, where); + if (IS_ENABLED(RES_DEBUG)) + printk(BIOS_SPEW, "NOW: %08x\n", reg); } break; } // switch @@ -126,27 +133,21 @@ void setup_resource_map_x_offset(const u32 *register_values, u32 max, u32 offset } -#if RES_DEBUG - printk(BIOS_DEBUG, "done.\n"); -#endif + if (IS_ENABLED(RES_DEBUG)) + printk(BIOS_DEBUG, "done.\n"); } void setup_resource_map_x(const u32 *register_values, u32 max) { u32 i; -#if RES_DEBUG - printk(BIOS_DEBUG, "setting up resource map ex offset...."); -#endif + if (IS_ENABLED(RES_DEBUG)) + printk(BIOS_DEBUG, "setting up resource map ex offset....\n"); -#if RES_DEBUG - printk(BIOS_DEBUG, "\n"); -#endif for(i = 0; i < max; i += 4) { -#if RES_DEBUG - printk(BIOS_DEBUG, "%04x: %02x %08x <- & %08x | %08x\n", - i/4, register_values[i],register_values[i+1], register_values[i+2], register_values[i+3]); -#endif + if (IS_ENABLED(RES_DEBUG)) + printk(BIOS_DEBUG, "%04x: %02x %08x <- & %08x | %08x\n", + i/4, register_values[i],register_values[i+1], register_values[i+2], register_values[i+3]); switch (register_values[i]) { case RES_PCI_IO: //PCI { @@ -188,9 +189,8 @@ void setup_resource_map_x(const u32 *register_values, u32 max) } -#if RES_DEBUG - printk(BIOS_DEBUG, "done.\n"); -#endif + if (IS_ENABLED(RES_DEBUG)) + printk(BIOS_DEBUG, "done.\n"); } #if 0 |