aboutsummaryrefslogtreecommitdiff
path: root/src/northbridge
diff options
context:
space:
mode:
authorElyes Haouas <ehaouas@noos.fr>2024-04-09 12:52:43 +0200
committerElyes Haouas <ehaouas@noos.fr>2024-04-09 22:22:44 +0000
commit54c9bf8e12240c8f91566b80462a8f8bdf1a5c16 (patch)
treed14de21d446c9a04fe62615743f9b25560d01b7f /src/northbridge
parentf40f3907d554f56e62ea0998e43c388ff3dec4c3 (diff)
tree: Drop unused <console/console.h>
Change-Id: Ib1a8fc50217c84e835080c70269ff50fc001392c Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81811 Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com> Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm> Reviewed-by: Yidi Lin <yidilin@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/haswell/early_pcie.c1
-rw-r--r--src/northbridge/intel/sandybridge/common.c1
2 files changed, 0 insertions, 2 deletions
diff --git a/src/northbridge/intel/haswell/early_pcie.c b/src/northbridge/intel/haswell/early_pcie.c
index d3940e3fac..3fc8713d29 100644
--- a/src/northbridge/intel/haswell/early_pcie.c
+++ b/src/northbridge/intel/haswell/early_pcie.c
@@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
-#include <console/console.h>
#include <device/pci_def.h>
#include <device/pci_mmio_cfg.h>
#include <device/pci_ops.h>
diff --git a/src/northbridge/intel/sandybridge/common.c b/src/northbridge/intel/sandybridge/common.c
index a6704914ac..0ee7e1d59b 100644
--- a/src/northbridge/intel/sandybridge/common.c
+++ b/src/northbridge/intel/sandybridge/common.c
@@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <console/console.h>
#include <device/device.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>