diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-04-30 12:47:03 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-19 20:48:55 +0200 |
| commit | 53815e1561365fa2ed512189b73e386cd9c7be96 (patch) | |
| tree | 22b272e6b048d24b76e88b3ac14bcf278fc322a1 /src/northbridge | |
| parent | d4f994bbc4f9fbe807f808d761aaa7d04b8f5133 (diff) | |
nb/intel/pineview/raminit: Remove very long delays
These delays, adding up to 600 ms, don’t seem to be needed, so remove
them.
TESTED on d510mo, boots fine without.
Change-Id: If089d6677fe95b086eeb00540acfbb66fa2e1c47
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19505
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Damien Zammit <damien@zamaudio.com>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/pineview/raminit.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c index c7c59ec8ba..c811d380c7 100644 --- a/src/northbridge/intel/pineview/raminit.c +++ b/src/northbridge/intel/pineview/raminit.c @@ -2577,12 +2577,9 @@ void sdram_initialize(int boot_path, const u8 *spd_addresses) /* Enable HPET */ enable_hpet(); - hpet_udelay(300000); MCHBAR16(0xc1c) = MCHBAR16(0xc1c) | (1 << 15); - hpet_udelay(100000); - sdram_clk_crossing(&si); sdram_checkreset(); @@ -2599,8 +2596,6 @@ void sdram_initialize(int boot_path, const u8 *spd_addresses) PRINTK_DEBUG("Done dlltiming\n"); } - hpet_udelay(200000); - if (si.boot_path != BOOT_PATH_RESET) { sdram_rcomp(&si); PRINTK_DEBUG("Done RCOMP\n"); |