summaryrefslogtreecommitdiff
path: root/src/northbridge
diff options
context:
space:
mode:
authorPatrick Georgi <patrick@georgi-clan.de>2014-09-29 20:42:33 +0200
committerPatrick Georgi <patrick@georgi-clan.de>2014-10-01 20:15:57 +0200
commit3cb86de4747593253a3b2d8d383784669b3e660b (patch)
treef8d973b37dff386eff4c8b2015468e56ff445543 /src/northbridge
parenta341a77177c3e4b6c8de16b368f457d3d23c549a (diff)
intel/i945: Another magic number
Replace it with the existing #define Change-Id: I6e67ed1a455cd4f9eeed1865b9ef981e7ef0a874 Found-by: Idwer Vollering Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/6992 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/i945/early_init.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index a1346830dd..24054bd987 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -757,7 +757,7 @@ static void i945_setup_pci_express_x16(void)
/* Set voltage specific parameters */
reg32 = pci_read_config32(PCI_DEV(0, 0x01, 0), 0xe80);
reg32 &= (0xf << 4); /* Default case 1.05V */
- if ((MCHBAR32(0xe08) & (1 << 20)) == 0) { /* 1.50V */
+ if ((MCHBAR32(DFT_STRAP1) & (1 << 20)) == 0) { /* 1.50V */
reg32 |= (7 << 4);
}
pci_write_config32(PCI_DEV(0, 0x01, 0), 0xe80, reg32);