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authorMichał Żygowski <michal.zygowski@3mdeb.com>2020-03-20 15:54:27 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-03-23 19:28:58 +0000
commit208318cdf4069778bdb60f689129e3207098bb82 (patch)
treef3e7752f74062c17b69b28b7232fadfffddfd1c0 /src/northbridge
parent89ae6b8fc2901b56dd1839a2d569493ce668a32c (diff)
nb/amd/pi/00730F01: initialize GNB IOAPIC
Northbridge IOAPIC was not being initialized which caused its APIC ID to be set to 0 (the same APIC ID as BSP). TEST=boot Debian Linux on PC Engines apu2 Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: Id06ad4c22a56eb3559e1d584fd0fcac1f95f13e7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39700 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/pi/00730F01/northbridge.c9
-rw-r--r--src/northbridge/amd/pi/nb_common.h1
2 files changed, 10 insertions, 0 deletions
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c
index 05c5142a70..c87d8fffba 100644
--- a/src/northbridge/amd/pi/00730F01/northbridge.c
+++ b/src/northbridge/amd/pi/00730F01/northbridge.c
@@ -15,6 +15,7 @@
#include <console/console.h>
#include <device/pci_ops.h>
#include <arch/acpi.h>
+#include <arch/ioapic.h>
#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
@@ -290,6 +291,7 @@ static void read_resources(struct device *dev)
{
u32 nodeid;
struct bus *link;
+ struct resource *res;
nodeid = amdfam16_nodeid(dev);
for (link = dev->link_list; link; link = link->next) {
@@ -304,6 +306,12 @@ static void read_resources(struct device *dev)
* the CPU_CLUSTER.
*/
mmconf_resource(dev, MMIO_CONF_BASE);
+
+ /* NB IOAPIC2 resource */
+ res = new_resource(dev, IO_APIC2_ADDR); /* IOAPIC2 */
+ res->base = IO_APIC2_ADDR;
+ res->size = 0x00001000;
+ res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}
static void set_resource(struct device *dev, struct resource *resource, u32 nodeid)
@@ -410,6 +418,7 @@ static void set_resources(struct device *dev)
static void northbridge_init(struct device *dev)
{
+ setup_ioapic((u8 *)IO_APIC2_ADDR, CONFIG_MAX_CPUS+1);
}
static unsigned long acpi_fill_hest(acpi_hest_t *hest)
diff --git a/src/northbridge/amd/pi/nb_common.h b/src/northbridge/amd/pi/nb_common.h
index 3e78155afd..46a5c1a58e 100644
--- a/src/northbridge/amd/pi/nb_common.h
+++ b/src/northbridge/amd/pi/nb_common.h
@@ -15,5 +15,6 @@
#define __AMD_NB_COMMON_H__
#define DEV_CDB 0x18
+#define IO_APIC2_ADDR 0xfec20000
#endif