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authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-06-25 11:40:00 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-12-11 08:59:35 +0100
commit1b7609c0e88ba820dbc2251fad0d994e2b54a154 (patch)
treef6d8d73ade4e1b6e7b5a3385d03f964d20e96c23 /src/northbridge
parent122e5bc6b1e551dd79035d26d943283e4cb7b2d7 (diff)
intel/nehalem: Use romstage_handoff for S3
Don't use scratchpad registers when we have romstage_handoff to pass S3 resume flag. Also fixes console log from reporting early in ramstage "Normal boot" while on S3 resume path. Change-Id: I2f1f05ef4fc640face3d9dc92d12cfe4ba852566 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17676 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/nehalem/nehalem.h4
-rw-r--r--src/northbridge/intel/nehalem/northbridge.c21
2 files changed, 0 insertions, 25 deletions
diff --git a/src/northbridge/intel/nehalem/nehalem.h b/src/northbridge/intel/nehalem/nehalem.h
index f20ef2da4b..ee8dd00a82 100644
--- a/src/northbridge/intel/nehalem/nehalem.h
+++ b/src/northbridge/intel/nehalem/nehalem.h
@@ -222,10 +222,6 @@ enum {
#define D0F0_TOLUD 0xb0
#define D0F0_SKPD 0xdc /* Scratchpad Data */
-#define SKPAD_ACPI_S3_MAGIC 0xcafed00d
-#define SKPAD_NORMAL_BOOT_MAGIC 0xcafebabe
-
-
#define D0F0_CAPID0 0xe0
#define TSEG 0xac /* TSEG base */
diff --git a/src/northbridge/intel/nehalem/northbridge.c b/src/northbridge/intel/nehalem/northbridge.c
index 779e49cd54..8a64aa3697 100644
--- a/src/northbridge/intel/nehalem/northbridge.c
+++ b/src/northbridge/intel/nehalem/northbridge.c
@@ -280,26 +280,6 @@ static void northbridge_init(struct device *dev)
MCHBAR32(0x5500) = 0x00100001;
}
-static void northbridge_enable(device_t dev)
-{
-#if CONFIG_HAVE_ACPI_RESUME
- switch (pci_read_config32(dev, SKPAD)) {
- case 0xcafebabe:
- printk(BIOS_DEBUG, "Normal boot.\n");
- acpi_slp_type = 0;
- break;
- case 0xcafed00d:
- printk(BIOS_DEBUG, "S3 Resume.\n");
- acpi_slp_type = 3;
- break;
- default:
- printk(BIOS_DEBUG, "Unknown boot method, assuming normal.\n");
- acpi_slp_type = 0;
- break;
- }
-#endif
-}
-
static struct pci_operations intel_pci_ops = {
.set_subsystem = intel_set_subsystem,
};
@@ -309,7 +289,6 @@ static struct device_operations mc_ops = {
.set_resources = mc_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = northbridge_init,
- .enable = northbridge_enable,
.acpi_fill_ssdt_generator = generate_cpu_entries,
.scan_bus = 0,
.ops_pci = &intel_pci_ops,