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authorKyösti Mälkki <kyosti.malkki@gmail.com>2015-05-27 07:58:22 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-11-06 21:12:22 +0100
commita62191b827411e0e42ac64cf42a861f649b874f9 (patch)
tree05d451caf4f3c0d680b82399b29479b2d3647b3a /src/northbridge
parent55ed6728b17669bdd7abe747327e58a2864a88e1 (diff)
amd/00730F01: Add missing headerfile
Change-Id: Id69b339bbed03d7a1f64aa5935721e7e8aab62fa Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/12265 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/pi/00730F01/pci_devs.h53
1 files changed, 53 insertions, 0 deletions
diff --git a/src/northbridge/amd/pi/00730F01/pci_devs.h b/src/northbridge/amd/pi/00730F01/pci_devs.h
new file mode 100644
index 0000000000..42e9d8aaa0
--- /dev/null
+++ b/src/northbridge/amd/pi/00730F01/pci_devs.h
@@ -0,0 +1,53 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Sage Electronic Engineering, LLC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef _AMD_00730F01_PCI_DEVS_H_
+#define _AMD_00730F01_PCI_DEVS_H_
+
+#define BUS0 0
+
+/* Graphics and Display */
+#define GFX_DEV 0x1
+#define GFX_FUNC 0
+#define GFX_DEVID 0x9850
+#define GFX_DEVFN PCI_DEVFN(GFX_DEV,GFX_FUNC)
+
+/* Internal Audio controller */
+#define ACTL_DEV 0x1
+#define ACTL_FUNC 1
+#define ACTL_DEVID 0x9840
+#define ACTL_DEVFN PCI_DEVFN(ACTL_DEV,ACTL_FUNC)
+
+/* PCIe Ports */
+#define NB_PCIE_PORT2_DEV 0x2
+#define NB_PCIE_FUNC0 0
+#define NB_PCIE_FUNC1 1
+#define NB_PCIE_FUNC2 2
+#define NB_PCIE_FUNC3 3
+#define NB_PCIE_FUNC4 4
+#define NB_PCIE_FUNC5 5
+#define NB_PCIE_PORT_DEVID 0x1439
+#define NB_PCIE_PORT0_DEVFN PCI_DEVFN(NB_PCIE_PORT2_DEV,NB_PCIE_FUNC0)
+#define NB_PCIE_PORT1_DEVFN PCI_DEVFN(NB_PCIE_PORT2_DEV,NB_PCIE_FUNC1)
+#define NB_PCIE_PORT2_DEVFN PCI_DEVFN(NB_PCIE_PORT2_DEV,NB_PCIE_FUNC2)
+#define NB_PCIE_PORT3_DEVFN PCI_DEVFN(NB_PCIE_PORT2_DEV,NB_PCIE_FUNC3)
+#define NB_PCIE_PORT4_DEVFN PCI_DEVFN(NB_PCIE_PORT2_DEV,NB_PCIE_FUNC4)
+#define NB_PCIE_PORT5_DEVFN PCI_DEVFN(NB_PCIE_PORT2_DEV,NB_PCIE_FUNC5)
+
+#endif /* _AMD_00730F01_PCI_DEVS_H_ */