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authorVladimir Serbinenko <phcoder@gmail.com>2014-01-02 10:16:46 +0100
committerVladimir Serbinenko <phcoder@gmail.com>2014-01-23 20:29:52 +0100
commit786c0f5fca4735f4d4b8d680749f6ef8b6198a3f (patch)
treed9beb30045a3e018340306bb0c3bb771a00f7013 /src/northbridge
parent969f8617e9ff4e71a11a8fc4567e8c8de33585a0 (diff)
nehalem: Fix SMRAM register address
Change-Id: If6646853039d15d6ba0fcf2b9b9b0658004be6e6 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4787 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/nehalem/nehalem.h4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/northbridge/intel/nehalem/nehalem.h b/src/northbridge/intel/nehalem/nehalem.h
index e81ac3f68c..e79a343941 100644
--- a/src/northbridge/intel/nehalem/nehalem.h
+++ b/src/northbridge/intel/nehalem/nehalem.h
@@ -219,8 +219,6 @@ enum {
#define QPD0F1_PAM(x) (0x40+(x)) /* 0-6*/
#define D0F0_REMAPBASE 0x98
#define D0F0_REMAPLIMIT 0x9a
-#define D0F0_SMRAM 0x9d
-#define D0F0_ESMRAMC 0x9e
#define D0F0_TOM 0xa0
#define D0F0_TOUUD 0xa2
#define D0F0_IGD_BASE 0xa4
@@ -477,7 +475,7 @@ void init_iommu(void);
#define X60BAR 0x60
#define LAC 0x87 /* Legacy Access Control */
-#define SMRAM 0x88 /* System Management RAM Control */
+#define QPD0F1_SMRAM 0x4d /* System Management RAM Control */
#define D_OPEN (1 << 6)
#define D_CLS (1 << 5)
#define D_LCK (1 << 4)