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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-12-19 23:43:56 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-02-06 07:33:51 +0000
commit0f30063abf4fa29ba6671dcbab7879334f7bd013 (patch)
treeb17043fd82103435f6ae5acf15e9924facd5d06c /src/northbridge
parent021c621eb0c8b21a34902519da595df94a973414 (diff)
soc/intel/broadwell: Conditionally skip PRE_GRAPHICS_DELAY
It was commented that the need for the delay was mainly related to external displays and only with VBIOS execution. Move the delay such that it is done only when we actually need to execute the VBIOS aka option rom. A delay is currently only defined for librem/purism_bdw in its Kconfig. As the description of the issue sounds like it would equally happen on other platforms when VBIOS is involved, promote the Kconfig visible option to global scope. Change-Id: I4503158576f35057373f003586bbf76af4d59b3d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48787 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/haswell/Kconfig9
-rw-r--r--src/northbridge/intel/haswell/gma.c1
2 files changed, 0 insertions, 10 deletions
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
index 28b7551e81..dcc9162fd0 100644
--- a/src/northbridge/intel/haswell/Kconfig
+++ b/src/northbridge/intel/haswell/Kconfig
@@ -90,15 +90,6 @@ config HASWELL_HIDE_PEG_FROM_MRC
However, it prevents MRC from programming PEG AFE registers,
which can make PEG devices unstable. When unsure, choose N.
-config PRE_GRAPHICS_DELAY
- int "Graphics initialization delay in ms"
- default 0
- help
- On some systems, coreboot boots so fast that connected monitors
- (mostly TVs) won't be able to wake up fast enough to talk to the
- VBIOS. On those systems we need to wait for a bit before executing
- the VBIOS.
-
# The UEFI System Agent binary needs to be at a fixed offset in the flash
# and can therefore only reside in the COREBOOT fmap region
config RO_REGION_ONLY
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index 3746fe35cc..e69cfec6de 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -444,7 +444,6 @@ static void gma_func0_init(struct device *dev)
if (!lightup_ok) {
printk(BIOS_SPEW, "FUI did not run; using VBIOS\n");
- mdelay(CONFIG_PRE_GRAPHICS_DELAY);
pci_dev_init(dev);
}