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author | Eric Lai <ericr_lai@compal.corp-partner.google.com> | 2020-05-26 20:10:22 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-28 09:40:42 +0000 |
commit | 087064f471650e90677fd990a84e976e601bd32a (patch) | |
tree | ff4a1b7912f7ae4596e10effb597294aa75a6f1d /src/northbridge | |
parent | be7507db29c7d4471878b1fa767da47901060223 (diff) |
soc/intel/tigerlake: Correct GPIO community PID configuration
Current implementation returns the incorrect GPIO community PID.
The GPIO community index 3 should return PID for COMM_4 and index
4 should return PID for COMM_5.
TEST=Verify PCR port id is correct for each community.
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I5dc48e5b31f43853b3a613c17f13f7df71f1fbfa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41725
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
0 files changed, 0 insertions, 0 deletions